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s-t111 series www.sii-ic.com high ripple-rejection low dropout cmos voltage regulator ? seiko instruments inc., 2003-2010 rev.3.0 _00 seiko instruments inc. 1 the s-t111 series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current consumption developed based on cmos technology. a built-in low on-resistance transistor provides a lo w dropout voltage and large output current, and a built-in overcurrent protector prevents the load current from exceeding the current capacitance of the output transistor. an on/off circuit ensures a long battery life. compar ed with the voltage regulator s using the conventional cmos process, a larger variety of capacitors are available, including sma ll ceramic capacitors. a small sot- 23-5 package realizes high-density mounting. ? features ? output voltage: 1.5 v to 5.5 v, selectable in 0.1 v steps. ? high-accuracy output voltage: 1.0% ? low dropout voltage: 190 mv typ. (3.0 v output product, i out = 100 ma) ? low current consumption: during operation: 50 a typ., 90 a max. during shutdown: 0.1 a typ., 1.0 a max. ? high peak current capability: 150 ma output is possible (at v in v out(s) + 1.0 v) *1 ? built-in on/off circuit: ensures long battery life. ? low esr capacitor can be used: a ceramic capacitor of 0.1 f or more can be used for the output capacitor. ? high ripple rejection: 80 db typ. (at 1.0 khz) ? built-in overcurrent protector: overcurrent of output trans istor can be restricted. ? lead-free, sn 100%, halogen-free *2 *1. attention should be paid to the power dissipation of the package when the output current is large. *2. refer to ? ? product name structure ? for details. ? applications ? power supply for battery-powered devices ? power supply for personal communication devices ? power supply for home electric/electronic appliances ? power supply for cellular phones ? package ? sot-23-5
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 2 ? block diagram vin vss vout overcurrent protector reference voltage circuit on/off *1. parasitic diode *1 on/off circuit figure 1
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 3 ? product name structure ? the product types and output voltage for the s-t111 series can be selected at the user?s request. refer to the ? 1. product name ? for the construction of the product name, ? 2. package ? regarding the package drawings and ? 3. product name list ? for the full product names. 1. product name s-t111 x xx xx ? xxx tf x output voltage 15 to 55 (e.g. when the output voltage is 1.5 v, it is ex p ressed as 15. ) ic direction in tape specifications *1 package name (abbreviation) mc: sot-23-5 environmental code u: lead-free (sn 100%), halogen-free g: lead-free (for details, please contact our sales office) product name (abbreviation) *2 product type *3 a: on/off pin negative logic b: on/off pin positive logic *1. refer to the tape specificat ions at the end of this book. *2. refer to the product name list. *3. refer to 3. shutdown (on/off pin) in the ? ? operation ?. 2. package drawing code package name package tape reel sot-23-5 mp005-a-p-sd mp 005-a-c-sd mp005-a-r-sd
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 4 3. product name list table 1 output voltage product name 1.5v1.0% s-t111b15mc-ogatfx 1.6v1.0% s-t111b16mc-ogbtfx 1.7v1.0% s-t111b17mc-ogctfx 1.8v1.0% s-t111b18mc-ogdtfx 1.9v1.0% s-t111b19mc-ogetfx 2.0v1.0% s-t111b20mc-ogftfx 2.1v1.0% s-t111b21mc-oggtfx 2.2v1.0% s-t111b22mc-oghtfx 2.3v1.0% s-t111b23mc-ogitfx 2.4v1.0% s-t111b24mc-ogjtfx 2.5v1.0% s-t111b25mc-ogktfx 2.6v1.0% s-t111b26mc-ogltfx 2.7v1.0% s-t111b27mc-ogmtfx 2.8v1.0% s-t111b28mc-ogntfx 2.9v1.0% s-t111b29mc-ogotfx 3.0v1.0% s-t111b30mc-ogptfx 3.1v1.0% s-t111b31mc-ogqtfx 3.2v1.0% s-t111b32mc-ogrtfx 3.3v1.0% s-t111b33mc-ogstfx 3.4v1.0% s-t111b34mc-ogttfx 3.5v1.0% s-t111b35mc-ogutfx 3.6v1.0% s-t111b36mc-ogvtfx 3.7v1.0% s-t111b37mc-ogwtfx 3.8v1.0% s-t111b38mc-ogxtfx 3.9v1.0% s-t111b39mc-ogytfx 4.0v1.0% s-t111b40mc-ogztfx 4.1v1.0% s-t111b41mc-ohatfx 4.2v1.0% s-t111b42mc-ohbtfx 4.3v1.0% s-t111b43mc-ohctfx 4.4v1.0% s-t111b44mc-ohdtfx 4.5v1.0% s-t111b45mc-ohetfx 4.6v1.0% s-t111b46mc-ohftfx 4.7v1.0% s-t111b47mc-ohgtfx 4.8v1.0% s-t111b48mc-ohhtfx 4.9v1.0% s-t111b49mc-ohitfx 5.0v1.0% s-t111b50mc-ohjtfx 5.1v1.0% s-t111b51mc-ohktfx 5.2v1.0% s-t111b52mc-ohltfx 5.3v1.0% s-t111b53mc-ohmtfx 5.4v1.0% s-t111b54mc-ohntfx 5.5v1.0% s-t111b55mc-ohotfx remark 1. please contact our sales offi ce for products with type a. 2. x: g or u 3. please select products of environmental code = u for sn 100%, halogen-free products.
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 5 ? pin configuration table 2 pin no. symbol description 1 on/off shutdown pin 2 vss gnd pin 3 nc *1 no connection 4 vout output voltage pin 5 vin input voltage pin *1. the nc pin is electrically open. the nc pin can be connected to vin or vss. 5 4 1 3 2 sot-23-5 top view figure 2 ? absolute maximum ratings table 3 (ta = 25 c unless otherwise specified) item symbol absolute maximum rating unit v in v ss ? 0.3 to v ss + 7 v input voltage v on/off v ss ? 0.3 to v in + 0.3 v output voltage v out v ss ? 0.3 to v in + 0.3 v 300 (when not mounted on board) mw power dissipation p d 600 *1 mw operating ambient temperature t opr ? 40 to + 85 c storage temperature t stg ? 40 to + 125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ratings are rated values exceeding which the product could suffer physical damage. these values must therefore not be exceeded under any conditions. 0 50 100 150 600 400 0 power dissi p ation ( p d ) [ mw ] ambient tem p erature ( ta ) [ c ] 200 100 300 500 700 figure 3 power dissipation of package (when mounted on board)
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 6 ? electrical characteristics table 4 (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test circuit output voltage *1 v out(e) v in = v out(s) + 1.0 v, i out = 30 ma v out(s) 0.99 v out(s) v out(s) 1.01 v 1 output current *2 i out v in v out(s) + 1.0 v 150 *5 ? ? ma 3 dropout voltage *3 v drop i out = 50 ma 1.5 v v out(s) 2.7 v not specified v 1 2.8 v v out(s) 5.5 v ? 0.08 0.14 v 1 i out = 100 ma 1.5 v v out(s) 1.6 v ? 0.32 0.55 v 1 1.7 v v out(s) 1.8 v ? 0.28 0.47 v 1 1.9 v v out(s) 2.3 v ? 0.25 0.35 v 1 2.4 v v out(s) 2.7 v ? 0.20 0.29 v 1 2.8 v v out(s) 5.5 v ? 0.19 0.26 v 1 line regulation outin out1 vv v ? v out(s) + 0.5 v v in 6.5 v, i out = 30 ma ? 0.05 0.2 % / v 1 load regulation v out2 v in = v out(s) + 1.0 v, 1.0 ma i out 80 ma ? 12 40 mv 1 output voltage temperature coefficient *4 out out vta v ? v in = v out(s) + 1.0 v, i out = 10 ma, ? 40 c ta 85 c ? 100 ? ppm / c1 current consumption during operation i ss1 v in = v out(s) + 1.0 v, on/off pin = on, no load ? 50 90 a 2 current consumption during shutdown i ss2 v in = v out(s) + 1.0 v, on/off pin = off, no load ? 0.1 1.0 a 2 input voltage v in ? 2.0 ? 6.5 v ? shutdown pin input voltage ?h? v sh v in = v out(s) + 1.0 v, r l = 1.0 k 1.5 ? ? v 4 shutdown pin input voltage ?l? v sl v in = v out(s) + 1.0 v, r l = 1.0 k ? ? 0.3 v 4 shutdown pin input current ?h? i sh v in = 6.5 v, v on/off = 6.5 v ? 0.1 ? 0.1 a 4 shutdown pin input current ?l? i sl v in = 6.5 v, v on/off = 0 v ? 0.1 ? 0.1 a 4 ripple rejection rr v in = v out(s) + 1.0 v, f = 1.0 khz, v rip = 0.5 vrms, i out = 30 ma ? 80 ? db 5 short-circuit current i short v in = v out(s) + 1.0 v, on/off pin = on, v out = 0 v ? 200 ? ma 3 *1. v out(s) : specified output voltage v out(e) : actual output voltage at the fixed load the output voltage when fixing i out ( = 30 ma) and inputting v out(s) + 1.0 v *2. the output current at which t he output voltage becomes 95% of v out(e) after gradually increasing the output current. *3. v drop = v in1 ? (v out3 0.98) v out3 is the output voltage when v in = v out(s) + 1.0 v and i out = 50 ma or i out = 100 ma. v in1 is the input voltage at which the output voltage becomes 98% of v out3 after gradually decreasing the input voltage. *4. the change in temperature [mv/c] is calculated using the following equation. 1000]c/ppm[ vta v ]v[v]c/mv[ ta v out out )s(out out ? ? = *3 *2 *1 *1. the change in temperatur e of the output voltage *2. specified output voltage *3. output voltage temperature coefficient *5. the output current can be at least this value. due to restrictions on the package power dissipation, this value may not be sati sfied. attention should be paid to the power dissipation of the package w hen the output current is large. this specification is guaranteed by design.
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 7 ? test circuits 1. vss vout on/off set to power on vin v a + + figure 4 2. vss vout on/off set to v in or gnd vin a figure 5 3. set to power on vss vout on/off vin v a + + figure 6 4. vss vout on/off vin a v r l + + figure 7 5. vss vout on/off vin v + set to power on r l figure 8
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 8 ? standard circuit on/off vss vout vin c in *1 c l *2 input output gnd single gnd *1. c in is a capacitor for stabilizing the input. *2. a ceramic capacitor of 0.1 f or more can be used for c l . figure 9 caution the above connection diagram and constant will not guarantee successful operation. perform thorough evaluation using the actual application to set the constant. ? application conditions input capacitor (c in ): 0.1 f or more output capacitor (c l ): 0.1 f or more esr of output capacitor: 10 or less caution a general series regulator may oscillate , depending on the external components selected. check that no oscillation occurs with the application using the above capacitor. ? selection of input and output capacitors (c in , c l ) the s-t111 series requires an output capacitor bet ween the vout and vss pins for phase compensation. operation is stabilized by a ceramic capac itor with an output capacitance of 0.1 f or more in the entire temperature range. however, when using an os capacit or, tantalum capacitor, or aluminum electrolytic capacitor, a ceramic capacitor with a capacitance of 0.1 f or more and an esr of 10 or less is required. the value of the output overshoot or undershoot transi ent response varies depending on the value of the output capacitor. the required capacitance of the i nput capacitor differs depending on the application. the recommended value for an application is 1.0 f or more for c in and 0.47 f or more for c l ; however, when selecting the output capacitor, perform sufficient evaluation, including ev aluation of temperature characteristics, on the actual device.
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 9 ? explanation of terms 1. low dropout voltage regulator the low dropout voltage regulator is a voltage regulat or whose dropout voltage is low due to its built-in low on-resistance transistor. 2. low esr a capacitor whose esr (equivalent series resistance) is low. the s-t111 series enables use of a low esr capacitor, such as a ceramic capac itor, for the output-side capacitor c l . a capacitor whose esr is 10 or less can be used. 3. output voltage (v out ) the accuracy of the out put voltage is ensured at 1.0% under the specified c onditions of fixed input voltage *1 , fixed output current, and fixed temperature. *1. differs depending on the product. caution if the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. please see the ?electrical characteristics? and attached characteristics data for details. 4. line regulation ? ? ? ? ? ? ? ? ? out in out1 v v v indicates the dependency of the output voltage on the input voltage. that is, the values show how much the output voltage changes due to a change in the input voltage with the output current remaining unchanged. 5. load regulation ( v out2 ) indicates the dependency of the output voltage on the output current. that is, the values show how much the output voltage changes due to a change in the output current with the input voltage remaining unchanged. 6. dropout voltage (v drop ) indicates the difference between the input voltage v in1 , which is the input voltage (v in ) at the point where the output voltage has fallen to 98% of the output voltage value v out3 after v in was gradually decreased from v in = v out(s) + 1.0 v, and the output voltage at that point (v out3 0.98). v drop = v in1 ? (v out3 0.98)
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 10 7. temperature coefficient of output voltage ? ? ? ? ? ? ? ? ? out out v ta v the shadowed area in figure 10 is the range where v out varies in the operating temperature range when the temperature coeffici ent of the output voltage is 100 ppm/ c. v out ( e ) *1 ex. s-t111b28 typ. ? 40 25 + 0.28 mv/ c v out [v] *1. v out(e) is the value of the output voltage measured at 25 c. 85 ta [ c] ? 0.28 mv/ c figure 10 a change in the temperature of the output voltage [m v/c] is calculated using the following equation. [] [] [] 1000cppm/ vta v vvcmv/ ta v out out out(s) out ? ? = 3* 2* *1 *1. change in temperature of output voltage *2. specified output voltage *3. output voltage temperature coefficient
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 11 ? operation 1. basic operation figure 11 shows the block diagram of the s-t111 series. the error amplifier compares the reference voltage (v ref ) with v fb , which is the output voltage resistance- divided by feedback resistors r s and r f . it supplies the output transistor with the gate voltage necessary to ensure a certain output voltage free of any fluctuations of input voltage and temperature. reference voltage circuit vout *1 *1. parasitic diode vss vin r s r f error amplifier current supply v ref ? + v fb figure 11 2. output transistor the s-t111 series uses a low on-resistance p-channel mos fet as the output transistor. be sure that v out does not exceed v in + 0.3 v to prevent the voltage regulator from being damaged due to inverse current flowing from the vout pin through a parasitic diode to the vin pin.
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 12 3. shutdown pin (on/off pin) this pin starts and stops the regulator. when the on/off pin is set to the shutdown level, the operation of all internal circuits stops, and the built- in p-channel mos fet output transistor between the vin pin and vout pin is turned off to substantially reduce the current consumption. the vout pin becomes the v ss level due to the internally divided resistance of several m between the vout pin and vss pin. the structure of the on/off pin is as shown in figure 12 . since the on/off pin is neither pulled down nor pulled up internally, do not use it in the floating st ate. in addition, note that the current consumption increases if a voltage of 0.3 v to v in ? 0.3 v is applied to the on/off pin. when the on/off pin is not used, connect it to the vss pin if the logic ty pe is ?a? and to the vin pin if it is ?b?. table 5 logic type on/off pin internal circuits vout pin voltage current consumption a ?l?: power on operating set value i ss1 a ?h?: power off stopped v ss level i ss2 b ?l?: power off stopped v ss level i ss2 b ?h?: power on operating set value i ss1 vss on/off vin figure 12
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 13 ? precautions ? wiring patterns for the vin, vout and gnd pins should be designed so that the impedance is low. when mounting an output capacitor between the vout and vss pins (c l ) and a capacitor for stabilizing the input between vin and vss pins (c in ), the distance from the capacit ors to these pins should be as short as possible. ? note that the output voltage may increase when a series regulator is used at low load current (1.0 ma or less). ? generally a series regulator may cause oscillati on, depending on the selection of external parts. the following conditions are recommended for this ic. howe ver, be sure to perform sufficient evaluation under the actual usage conditions for selection, incl uding evaluation of temper ature characteristics. input capacitor (c in ): 1.0 f or more output capacitor (c l ): 0.47 f or more equivalent series resistance (esr): 10 or less ? the voltage regulator may oscillate when the im pedance of the power supply is high and the input capacitor is small or an input capacitor is not connected. ? the application conditions for the input voltage, output voltage, and load curr ent should not exceed the package power dissipation. ? do not apply an electrostatic discharge to this ic that exceeds the performanc e ratings of the built-in electrostatic protection circuit. ? in determining the output current, attention should be paid to the output current value specified in table 4 in the ? ? electrical characteristics ? and footnote *5 of the table. ? sii claims no responsibility for any disputes arising out of or in connection with any infringement by products including this ic of patents owned by a third party.
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 14 ? typical characteristics (1) output voltage vs. output current (when load current increases) s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) v out [v] 0 100 200 300 400 500 600 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 v in = 1.8 v 2.5 v 6.5 v v out [v] 200 300 400 500 100 0 600 v in = 3.3 v 4.0 v 6.5 v 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 i out [ma] i out [ma] s-t111b50 (ta = 25c) v out [v] 200 300 400 100 0 v in = 5.3 v 6.0 v 6.5 v 500 6 5 4 3 2 1 0 600 i out [ma] remark in determining the output current, attention should be paid to the following. 1) the minimum output current value and footnote *5 in the ? ? electrical characteristics ? 2) the package power dissipation (2) output voltage vs. input voltage s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) v out [v] 1.6 1.5 1.4 1.3 1.2 1.1 1.0 i out = 1 ma 30 ma 50 ma 3.5 3.0 2.5 2.0 1.5 1.0 v out [v] 3.1 3.0 2.9 2.8 2.7 2.6 2.5 i out = 1 ma 30 ma 50 ma 5.0 4.5 4.0 3.5 3.0 2.5 v in [v] v in [v] s-t111b50 (ta = 25c) v out [v] i out = 1 ma 30 ma 50 ma 5.5 5.0 4.5 4.0 3.5 3.0 2.5 7.0 6.0 5.0 4.0 3.0 2.0 v in [v]
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 15 (3) dropout voltage vs. output current s-t111b15 s-t111b30 v drop [v] ?40c 25c 85c 0 50 100 150 200 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 v drop [v] ?40c 25c 85c 0 50 100 150 200 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 i out [ma] i out [ma] s-t111b50 v drop [v] 25c 0 50 100 150 200 ?40c 85c 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 i out [ma] (4) dropout voltage vs. set output voltage v drop [v] 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 7 1 2 3 4 5 6 0 100 ma 150 ma 50 ma 30 ma 10 ma v ota [v]
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 16 (5) output voltage vs. ambient temperature s-t111b15 s-t111b30 v out [v] 1.60 1.55 1.50 1.45 1.40 25 ?25 75 100 ?50 0 50 v out [v] 0 25 ?50 ?25 50 75 100 3.20 3.15 3.10 3.05 3.00 2.95 2.90 2.85 2.80 ta [ c] ta [ c] s-t111b50 v out [v] 100 75 50 25 0 ?25 ?50 5.3 5.2 5.1 5.0 4.9 4.8 4.7 ta [ c] (6) current consumption vs. input voltage s-t111b15 s-t111b30 i ss1 [ a] 120 100 80 60 40 20 0 8 6 4 2 0 85c 25c ? 40c i ss1 [ a] 6 4 2 0 120 100 80 60 40 20 0 8 85c 25c ? 40c v in [v] v in [v] s-t111b50 i ss1 [ a] 0 2 4 6 8 120 100 80 60 40 20 0 25c ? 40c 85c v in [v]
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 17 (7) ripple rejection s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) v in = 2.5 v, c out = 0.47 f v in = 4.0 v, c out = 0.47 f ripple rejection [db] 100 1k 10k 100k 10 i out = 1 ma 30 m a 50 m a 1m 100 80 60 40 20 0 ripple rejection [db] 100 1k 10k 100k 10 i out = 1 ma 30 m a 50 m a 1m 100 80 60 40 20 0 frequency [hz] frequency [hz] s-t111b50 (ta = 25c) v in = 6.0 v, c out = 0.47 f ripple rejection [db] 100 1k 10k 100k 10 i out = 1 ma 30 m a 50 m a 1m 100 80 60 40 20 0 frequency [hz]
high ripple-rejection low dropout cmos voltage regulator s-t111 series rev.3.0 _00 seiko instruments inc. 18 ? reference data (1) input transient response characteristics s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) i out = 30 ma, tr = tf = 5.0 s, c out = 0.47 f, c in = 0 f i out = 30 ma, tr = tf = 5.0 s, c out = 0.47 f, c in = 0 f v out [v] 1.62 1.60 1.58 1.56 1.54 1.52 1.50 1.48 1.46 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v in v out -40 -20 0 20 40 60 80 100 120 140 160 v in [v] v out [v] -40 -20 0 20 40 60 80 100 120 140 160 v in v out 3.08 3.06 3.04 3.02 3.00 2.98 2.96 6 5 4 3 2 1 0 v in [v] t [ s] t [ s] s-t111b50 (ta = 25c) i out = 30 ma, tr = tf = 5.0 s, c out = 0.47 f, c in = 0 f v out [v] 5.12 5.10 5.08 5.06 5.04 5.02 5.00 4.98 4.96 8 7 6 5 4 3 2 1 0 v in v out -40 -20 0 20 40 60 80 100 120 140 160 v in [v] t [ s] (2) load transient response characteristics s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) v in = 2.5 v, c out = 0.47 f, c in = 1.0 f, i out = 50? 100 ma v in = 4.0 v, c out = 0.47 f, c in = 1.0 f, i out = 50? 100 ma v out [v] 0 20 40 60 80 100 120 140 -40 -20 160 i out v out 1.70 1.65 1.60 1.55 1.50 1.45 1.40 150 100 50 0 ?50 ?100 ?150 i out [ma] v out [v] 0 20 40 60 80 100 120 140 -40 -20 160 i out v out 150 100 50 0 ?50 ?100 ?150 3.20 3.15 3.10 3.05 3.00 2.95 2.90 i out [ma] t [ s] t [ s] s-t111b50 (ta = 25c) v in = 6.0 v, c out = 0.47 f, c in = 1.0 f, i out = 50? 100 ma v out [v] 0 20 40 60 80 100 120 140 -40 -20 160 v out i out 5.20 5.15 5.10 5.05 5.00 4.95 4.90 150 100 50 0 ?50 ?100 ?150 i out [ma] t [ s]
high ripple-rejection low dropo ut cmos voltage regulator rev.3.0 _00 s-t111 series seiko instruments inc. 19 (3) shutdown pin transient response characteristics s-t111b15 (ta = 25c) s-t111b30 (ta = 25c) v in = 2.5 v, c out = 0.47 f, c in = 1.0 f, i out = 100 ma v in = 4.0 v, c out = 0.47 f, c in = 1.0 f, i out = 100 ma v out [v] v on/off v out 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -0.4 -0.2 1.6 3 2 1 0 ?1 ?2 ?3 5 4 3 2 1 0 ?1 v on/off [v] v out [v] 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -0.4 -0.2 1.6 v on/off v out 6 4 2 0 ?2 ?4 ?6 10 8 6 4 2 0 ?2 v on/off [v] t [ms] t [ms]

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www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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